Guaranteed Packet Capture with DAG® Technology

Using our exclusive DAG® technology, Endace solutions provide non intrusive packet capture, for any packet size, at any network speed, with zero packet loss. Founded on customized field programmable gate arrays (FPGAs), Endace products adapt quickly and effortlessly to the demands of high speed packet capture. While alternative application-specific integrated circuits (ASICs) are difficult, costly and time-consuming to upgrade, FPGAs can be reprogrammed in a snap in order to handle the ever-changing service-driven network protocol enhancements.

FPGAs are at the core of Endace’s superior packet capture offerings. The technology enables zero-copy wire-to-user direct memory access (DMA), thereby avoiding the random packet discard effects of interrupt-driven NIC-CPU communication. Throughout the write process, CPU loading is kept to bear idling levels while the FPGA-based design facilitates traffic manipulation that extends numerous advantages when acquiring, interrogating and storing data. With a combination of hashing functions, logic gates, colorizers and complex algorithms, unwanted traffic can be discarded while flows-of-interest can be duplicated then load-balanced across, or individually steered to, multiple distinct CPU cores using identifiers from ISO/OSI layer 1 to layer 4.

This foundation is totally agnostic, supporting Ethernet and Packet-Over-SONET (PoS), IP and InfiniBand, guaranteeing packet capture, regardless of packet rate and size, at interface speeds up to 40Gbps.